1. Field of Use
The present invention relates to data processing systems and more particularly to multiprocessing systems which perform locking operations, such as read-modify-write operations.
2. Prior Art
In multiprocessor systems, processing units are required to share the use of memory resources. A locking mechanism is normally used in conjunction with such resources to ensure that the resource is accessed by only one processing unit at a time.
Most access difficulties are encountered when a processing unit is required to perform an instruction sequence specifying a read-modify-write (RMW) operation. In an RMW operation, one processing unit fetches data from a location in memory, performs an operation on the data contents of the location and writes the modified data back into the original memory location.
One way to prevent more than one processing unit from performing a RMW operation on the same memory location, an interlock read instruction is utilized. This involves the use of a lock indicator device, which is set during the read portion of an RMW operation to prevent access to a specific memory location, and is reset after the write portion of the RMW operation is completed. If a second processing unit should attempt to access the same memory location to perform an RMW operation, the memory subsystem will send a busy signal indicating that the memory location is in use.
From the above, it can be seen that unpredictable results affecting data integrity can occur if a lock mechanism fails to operate properly. Accordingly, the lock mechanism becomes very important to the operation of a multiprocessor system, in the event that anything should go wrong with such lock mechanism. Therefore, a need exists to be able to alter the state of such mechanism for enabling system recovery once having detected that the lock mechanism is operating improperly.
Additionally, it becomes desirable in certain situations to change the state of other kinds of resources included within a subsystem unit without disturbing the unit's overall state. In many systems, these units connect in common to an asynchronously operated system bus. It has been found that once a bus cycle of operation is started, it is not possible to withdraw from the bus cycle until the operation is completed. Accordingly, when it becomes desirable to change the state of a resource, such as a lock mechanism, the commands issued to accomplish this type of operation still resulted in having the memory involved in the operation perform a cycle of operation and inhibit the transfer of the memory data accessed. This can prove undesirable, particularly in the case of recovery operations.
Accordingly, it is a primary object of the present invention to provide for reliable recovery operations within a multiprocessor system.
It is a more specific object of the present invention for recovery of multiprocessor system operation in the event of a resource failure.